# Choose your foundation practice route

You can jump to any available lesson. Choose practice by the hardware idea you want to test, not by your software job title. These routes organize practice; they do not certify mastery or board readiness.

## Start with the lessons

Read a lesson, commit its short checks, then use that lesson’s workbook tasks. The first task practices a trace or calculation, the second asks for an explanation or contract, and the final task asks you to apply the ideas in a new case. Keep the first answer before viewing feedback. If you use hints or revise an answer, record that help separately.

## Take the challenge route

If you can already read the basic logic and arithmetic, go directly to the five transfer tasks after reviewing each lesson’s model assumptions. Do not spend time repeating a calculation you can already explain. Each task has no hints and asks for a written answer before review:

| Lesson | Workbook task | What to produce | What a review should look for |
| --- | --- | --- | --- |
| 1 · Circuit and host | **f1-transfer · Preserve a player’s rhythm** | A division of work, data fields and timing explanation | Capture timing remains independent of delayed browser work; fields carry enough meaning for replay. |
| 2 · Bits and decisions | **f2-transfer · Two fields, one bit pattern** | Both numeric interpretations and a field contract | Width and signedness follow each field’s declared meaning. |
| 3 · Clocks and state | **f3-transfer · Include the start, exclude the stop** | A predicate, three case results and an old-state explanation | Start, stop and inactive-state cases obey the stated priorities. |
| 4 · Queues and flow | **f4-transfer · Reserve space for live events** | A bounded storage/admission policy and overflow report | Reserved capacity actually exists when events arrive; priority alone is not a capacity guarantee. |
| 5 · Test and connect | **f5-transfer · Review a claimed success** | Three concrete checks and a defensible operating bound | Stimuli and expected observations test the claim; functional, timing and physical evidence stay distinct. |

Review against the author rubric only after writing your answer, with a teacher or a separately supplied answer sheet. A correct final number with a contradictory explanation needs repair. A different design can be valid when it meets every stated requirement.

## Repair one concept

If an answer exposes a gap, revisit the specific teaching section named in feedback and attempt its fresh case in **repair-workbook.md**. Use just the relevant case; all fifteen are not another required worksheet. Return to a harder task when you can explain the rule and its consequence.

| If the difficulty is… | Review and fresh practice |
| --- | --- |
| Capture, buffering or delayed delivery | FSC-01 · R01 |
| Device/host ownership | FSC-02 · R02 |
| What a model run supports | FSC-03 · R03 |
| Translating a decision rule | FSC-04 · R04 |
| Continuous input selection | FSC-05 · R05 |
| Width or signed interpretation | FSC-06 · R06 |
| Old and new register values | FSC-07 · R07 |
| Counter wrap and elapsed time | FSC-08 · R08 |
| Same-edge control priorities | FSC-09 · R09 |
| Accepted transfers during a stall | FSC-10 · R10 |
| Queue and loss accounting | FSC-11 · R11 |
| Bursts, sustained rates or capacity guarantees | FSC-12 · R12 |
| Useful test evidence | FSC-13 · R13 |
| Partial or joined byte reads | FSC-14 · R14 |
| Complete-path costs | FSC-15 · R15 |

Repair after feedback is useful practice. It is not a fresh, unaided measurement of the original attempt. A later independent assessment needs different cases that have not already been shown to you.

## Go deeper without a board

For an optional extension, take one transfer answer and write the smallest counterexample to a tempting wrong design: an edge trace that loses the first event, a storage schedule that defeats priority without reservation, or a record stream that passes a count-only test while corrupting order. Then state a rule that excludes your counterexample and one boundary case that still satisfies it.

No HDL compiler, installation or physical connection is required for this route. These answers describe and test conceptual contracts; a board build would need separate simulation, implementation timing and physical evidence.